Design-Space Exploration of Low Power Coarse Grained Reconfigurable Datapath Array Architectures

Coarse-grain reconfigurable architectures promise to be more adequate for computational tasks due to their better efficiency and higher speed. Since the coarse granularity implies also a reduction of flexibility, a universal architecture seems to be hardly feasible, especially under consideration of low power applications like mobile communication. Based on the KressArray architecture family, a design-space exploration system is being implemented, which supports the designer in finding an appropriate architecture featuring an optimized performance / power trade-off for a given application domain. By comparative analysis of the results of a number of different experimental application-to-array mappings, the explorer system derives architectural suggestions. This paper proposes the application of the exploration approach for low power KressArrays. Hereby, both the interconnect power dissipation and the operator activity is taken into account.